Transcript

Chapter 4

Electrodeposition
Madhav Datta

4.1 Introduction
Electrodeposition is the process of cathodic deposition of metals, alloys, and other conducting materials from an electrolyte using an external potential (electric current) for the cation reduction process to occur at the working substrate. The deposition process is also known as electrolytic plating, electroplating, or simply plating. Electrodeposition is widely employed in a variety of applications ranging from coatings for wear and corrosion resistance to nanoscale feature fabrication for ultra-large-scale integration (ULSI). The deposition thickness may vary from few angstroms of uniformly deposited compact films to electroformed structures that are millimeters thick. Compared to competing vacuum deposition processes, electrodeposition has emerged as more environmentally friendly and cost-effective micro/nanofabrication method. These features of electrodeposition make it an enabling technology for applications such as chip metallization and flipchip solder bumping. Electrodeposition has thus become an integral part of wafer processing fabs and an enabling technology in many aspects of microelectronic packaging. Although some aspects of electrodeposition still remain empirical, the gap between fundamental understanding and manufacturing application is narrowing [1]. In the following text the terms electrodeposition, electroplating, and plating are used synonymously. Advances in electrodeposition have played a major role in the phenomenal growth of storage, chip interconnects, microelectronic packaging, microelectromechanical systems (MEMS), and many other microelectronic and micromechanical components [2–10]. Some early examples of electrodeposition in the electronics industry include fabrication of printed circuit boards. Continued advances in plating processes for fine line wiring technology have contributed to the development of advanced boards and packages that are used today. Development of alloy plating

M. Datta (B) Cooligy Inc., 800 Maude Avenue, Mountain View, CA 94043, USA e-mail: [email protected]

Y. Shacham-Diamand et al. (eds.), Advanced Nanoscale ULSI Interconnects: Fundamentals and Applications, DOI 10.1007/978-0-387-95868-2_4, C Springer Science+Business Media, LLC 2009

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These applications heavily relied on the advances in electroplating technologies which have been possible due to simultaneous progress in different areas. A continuous seed layer conformally covers the patterned dielectric.2 Key Considerations For electroplating on silicon wafers. the material change from aluminum to copper for chip metallization has been heralded as a major breakthrough that will enable extension of Moore’s law beyond its earlier expectations. Small changes in process conditions can have an enormous effect on the microstructure and composition of the deposit and hence its properties. Chemical mechanical polishing (CMP) is used for planarization and removal of excess ‘‘overburden’’ metal and seed layers. which provides electric current path from the wafer edge contact to all points in the wafer where deposition is desired. and the application of through-mask plating for thin film heads laid the foundation for the advances in electrochemical technology in the micro. 4]. They include (i) continuous improvements and innovations in photolithography. and (iii) development of high yielding electrochemical processing tools that are compatible with ultra-clean semiconductor fabrications [10]. and metallization for multi-chip modules and other advanced packages [9]. precision plating tool. These aspects of electroplating offer the possibility of fabricating structures with tailored materials and properties.and nanostructures requires a thorough understanding of the underlying electrochemical engineering principles. While photoresist masks in through-mask plating are stripped to release the plated structure.and nanofabrication processes and the ability to produce tailored materials and structures.64 M. in Damascene plating the patterned dielectric remains intact and forms a functional part of the structure. Precise control of the additives and process parameters is extremely critical to obtain reproducibility and uniformity . Some of these aspects are briefly discussed below. Datta process. This involves the understanding of the ability to produce tailored materials and structures and the application of the principles of mass transport and current distribution [11]. (ii) fundamental understanding of the engineering principles that govern electrochemical micro. Two different types of electroplating are applicable in the fabrication of a metallic structure: (i) through-mask plating (ii) and Damascene plating. Other applications of electroplating in microelectronics include fabrication of connectors and interconnect.and nanoelectronics industry [2]. Indeed. one of the essential requirements is the presence of a continuous conducting layer (seed layer). Phenomenal advances in electroplating occurred in the last decade when it enabled a paradigm shift in chip making with the introduction of plated flip-chip technology and Cu metallization for chip interconnects [6–8]. Plating occurs all over the surface thus creating challenges for void-free structure fabrication [7]. Continued efforts on the development of novel magnetic materials and their precision plating have led to the advanced storage devices [3. These small changes may be in the form of additives or complexing agents or in the deposition parameters. Development of electroplating processes and tools for fabrication of micro. 4.

and incorporation of additives or hydrogen may contribute to the internal stress. Grain refining and brightening are related to inhibition which affects nucleation and growth. It is well known that electrodeposition under limiting current conditions leads to dendritic or powdery deposits [12. Such studies of the interactions between different additive species . 15]. Schimdt et al. Current density on a feature is higher when it is spaced farther away from a neighboring feature. At the substrate level. Kelly et al. Mismatch between substrate and deposit. Early studies of the role of additives for the development of microstructure in electrodeposition were performed by Seiter and Fischer [19]. while the presence of thiourea led to the formation of small flat plates. Surfactants are also commonly added to plating electrolytes to facilitate evacuation of gas bubbles. In patterned plating. they are more strongly inhibited by the additives. and brightening. On the pattern scale. the current distribution depends on the feature geometry and the spacing. A leveling agent is a suitably chosen additive that generally acts as an inhibitor for the metal deposition reaction. The presence of BTA decreased the size of nuclei and increased their number. the current distribution evolves with time due to the continuously changing shape of the feature.4 Electrodeposition 65 of deposition. The use of additives in electrodepositon of copper is a widely studied topic. repeating pattern scale. The current distribution in patterned plating is considered on three different scales: substrate scale. Internal stress that frequently develops in electrodeposits can cause cracking or loss of adhesion. These criteria determine the thickness and uniformity of blanket deposited layers. [23] investigated the synergistic effects of adsorbed species using electrochemical methods and near field microscopy. 14. leading to preferential metal deposition into recess. the value of the operating current density with respect to the mass transport limited current density is a critical parameter for deposit morphology. These authors demonstrated a strong synergistic effect between the adsorbed plating additive and the chloride ion. Fisher’s concepts were further refined by Winand [20] and the factors affecting microstructure of electrodeposits were also discussed by Landolt [12]. [21] found that in a sulfate solution without additives copper nucleation on gold was three-dimensional. These concepts have been used to develop understanding of superfilling during dual-Damascene plating and to develop electroplating baths for Cu interconnects. Therefore. 13]. Since peaks are more accessible than valleys. who recognized the importance of inhibition for obtaining fine-grained deposits. Additives are widely employed in electroplating practice for grain refining. The current distribution within the features is influenced by the use of suitable additives [7. they also determine the shape evolution. Mass transport conditions at the wafer limit the rate of electroplating and influences the current distribution and microstructure of the deposit. It is consumed at the cathode and its reaction rate is mass transport controlled [15–18]. stress relieve. the current distribution is governed by the overall cell geometry and the uniformity of current distribution is generally achieved by using auxiliary electrodes or current shielding concepts. grain coalescence during growth. leveling. Armstrong and Muller [22] found that BTA inhibits the growth of specific planes of copper but does not affect the number of nuclei. and feature scale [14]. and superfilling. On a feature scale. leveling.

when the nobler component is present at small concentration in the electrolyte its pulselimiting current density is exceeded during deposition of the less noble component. The pulse-limiting current density ipL corresponds to that value of peak current. In the presence of significant mass transport effects the situation is quite different. This can lead to spatial uniformity of composition because one component is governed by tertiary current distribution and the other by secondary current distribution. where the reactant concentration at the surface reaches zero just at the end of a pulse. Mass transport in pulse plating has been studied by a number of authors [24–26]. Two different limiting currents must be distinguished.3 Pulse Plating and Pulse Reverse Plating Pulsating the current (or voltage) permits the plating process to be operated at higher average current density than dc plating without the formation of dendrites. the relative contribution of each diffusion process can be controlled. 4. however. Because the pulse current density is always higher than the average current density the Wagner number corresponding to a given deposition rate is smaller in pulse plating than in dc plating and the current distribution therefore is less uniform. In principle. For an average current density corresponding to a secondary current distribution in dc plating a tertiary current distribution may therefore prevail in pulse plating under certain conditions leading to a more uniform current distribution. which governs of significant mass transport effects the Wagner number. Due to the high instantaneous current densities applied in pulse plating the reaction rate during the pulse on time may become limited by non-steady-state mass transport even under conditions where the average current density is well below the dc limiting current density. In alloy deposition. ip. Wa = dρ eL secondary current distribution in pulse-plating depends on the pulse current density rather than the average current density. Depending on the mass transport conditions at the cathode. in metal deposition using pulse plating one usually works well below the pulse-limiting current density in order to avoid dendrite formation. the composition of alloy deposits can be varied by varying pulse parameters while keeping the average current density constant. and the current distribution in pulse plating may be more uniform than in dc plating. Datta and their role in the nucleation and growth of deposits in nanostructures are of great importance to understand the mechanisms involved in Damascene plating of copper interconnects.66 M. . For a applied pulse current density close to ipL the current distribution is governed mostly by non-steady-state mass transport and therefore may become relatively uniform. the steady-state limiting current density iL which for a given electrolyte concentration depends only on hydrodynamic conditions and the pulse-limiting current density. In the absence η/di . ipL . pulsating current creates a combination of steady-state and non-steady-state diffusion processes such that by varying the pulse parameters. Furthermore. Indeed. on the other hand. the current distribution in pulse plating can be less or more uniform than in dc plating.

pyrophosphate.4 Electrodeposition of Copper Copper is the most commonly plated material for its varying decorative. For example. Increasing inhibition and/or increasing current density produces fine-grained structures. pulse reverse plating was considered by the authors as a promising technique for improving current distribution. internal stress. fluoborate. and acid sulfate baths [30]. Yung et al. one can apply a cathodic pulse corresponding to a relatively uniform secondary or tertiary current distribution. In order to achieve this. High speed plating fluoborate baths and pyrophosphate baths used in plated through-hole PCBs have been mostly replaced by acid sulfate baths that have become the most commonly used.and nanoelectronics. microhardness. Although the use of pc leads to a less uniform current distribution than the use of dc. [28] investigated the applicability of pulse plating and pulse reverse plating in through-hole plating taking into account both the potential distribution and the prevailing mass transport conditions. A list of these additives and their functions in electrodeposition of copper is presented in [30] and of applied current density on the deposit morphology has been reported in the literature [13. The current distribution therefore depends on the absolute dimension of the hole in addition to the aspect ratio. . the use of proper additives is essential for leveling and superfilling [7.4 Electrodeposition 67 Pulse reverse plating offers the possibility of achieving more uniform current distribution than in dc plating. Kinetically limited growth tends to favor compact columnar or equiaxial growth in copper deposits while mass transport limited growth favors formation of loose dendritic deposits. in agreement with Pesco and Cheh [27]. grain refining. The sulfate bath generally contains chloride ions in varying range of concentrations to influence the deposit properties such as microstructure. functional. During electroplating of microfeatures. From their theoretical analysis the authors concluded that throwing power is not improved by pulse plating but the use of pulse reverse plating may lead to more uniform deposits. Several organic additives are also frequently added to the bath to influence surface finish. followed by a short high current density anodic pulse corresponding to a primary current distribution. Due to toxicity and waste treatment issues. Wan et al. 4. 31–33]. 34]. cyanide baths are getting replaced by non-cyanide baths. and suppression of dendritic deposition. Several different types of copper plating systems that have been reported in the literature include alkaline cyanide. [29] showed that the critical parameter characterizing the deposition rate in through-hole plating is proportional to L2 /r where L is the printed circuit board thickness and r is the hole radius. and engineering applications. cost-effective copper plating systems in the micro. crystallographic orientation. the pulse parameters are so chosen that during the cathodic deposition cycle the current distribution is more uniform than during the anodic dissolution cycle. Copper sulfate and sulfuric acid are the primary constituents of the acid sulfate baths. The application of pulse reverse current is throughhole plating was studied by Pesco and Cheh [27]. and surface appearance.

which acts to suppress the electrodeposition rate especially in the presence of chloride ions. This differential bottom-up plating rate leads to superfilling. several organic additives are added to the bath. and the wafer planarized by CMP. superfilling deposition. Finally. Due to these reasons and due to relatively less expensive tooling. these additives can be broadly categorized into two types: an accelerator and an inhibitor. In dual-Damascene plating. The Damascene copper plating process is typically based on a chloridecontaining acid copper sulfate solution [7. where top ridges build up first thus creating a void in the middle of the structure. structure-dependent properties such as sheet resistance and internal stress of deposits may change slowly with time after deposition. compared with the easily accessible flat top surface and upper side walls. The main inhibitor is generally a glycol. Inhibitor additive (s) in the bath may contain one or more components. the excess material is removed. which spontaneously recrystallize even at room temperature [35]. electroplating is a cost-effective and efficient process for Cu interconnects fabrication.68 M. Based on their function. and planarized to create a metal layer consisting of vias and lines [7]. So formed voids and seams lead to electromigration problems in submicrometer interconnect structures. 36]. Datta Additives that act as inhibitors tend to promote formation of fine equiaxial grains. . Small amounts of organic additives added in right concentrations can increase the plating rate inside trenches and vias relative to the planar surface. particularly in narrow trenches.4. Electroplating enables deposition of Cu in via holes and overlying trenches in a single step thus eliminating via/line interface and significantly reducing the cycle time. Formation of seams is commonly observed during conformal plating as well. A sandwich of two levels of insulator and etch stop layers is patterned as holes for vias and troughs for lines. Some baths also contain a nitrogen-containing molecule that acts as a leveling agent. The accelerator is essentially an organic sulfur-containing compound (a mercapto species) that preferentially adsorbs at the bottom of a via. These defects can also entrap electrolyte that can lead to serious corrosion issues.1 Electrodeposition Process for Copper Interconnects Cu interconnects are fabricated by dual-Damascene process which is referred to a metallization patterning process by which two insulator (dielectric) levels are patterned. Electrodeposited copper may contain non-equilibrium grain structures. For defect-free. As a consequence. 4. defect-free filling of trenches can be achieved by creating a condition where higher deposition rate is achieved in less accessible bottom of the trenches. which may lead to increased internal stress. Competitive adsorption of these inhibitor molecules together with the fact that one or more of these co-adsorbed species may be mass transport controlled lead to a condition whereby via/trench bottoms are less inhibited. filled. In such a system formation of voids is very common. They are then filled with a single metallization step. Elimination of voids and seams is therefore very critical to minimize electromigration and other reliability issues. Such seams can be as disastrous as the voids.

low resistivity. Moffat et al. In addition to the superfilling property. and Paunovic.: Electrochemical formation and microstructure in thin films for high functional devices. This phenomenon gives rise to bottom-up superfilling of submicrometer trenches and vias.4 Electrodeposition 69 Mathematical modeling work by Dukovic et al. it is possible to obtain higher deposition rate at the bottom of via/trench. Schlesinger. New York (2000) 2. 2985 (1997) . and Hatzakis. Osaka T. L.: Modern Electroplating (eds. and reliability issues. 4th edition. T. 3015 (1997) 4. 37–39] and West et al. Wiley Interscience. excellent adherence of copper lines/vias to the dielectric.5 Concluding Remarks This chapter presented a brief description of electrodeposition process and a focused discussion of copper electrodeposition for chip interconnects. Romankiw. 40] explained the superconformal electrodeposition of copper by a curvature enhanced accelerator coverage model. Romankiw. It is evident that a delicate balance of respective additives is needed in the bath to obtain precise fabrication of void-free. this leads to enrichment of the accelerator on the evolving concave surfaces and depletion on convex surfaces. these additives also influence the deposit structure (hence stress) and roughness. 14] assumed that the additives react under diffusion control while the metal deposition reaction is under activation controlled. L. Successful implementation of the copper electrodeposition process in high volume chip manufacturing involves equal attention to metrology. Acta. reliable interconnect electrodeposition process.: A path: from electroplating through lithographic masks in electronics to LIGA in MEMS. selection of a reliable CMP process. Croll. Besides void-free deposition of interconnect structures. [23. Acta. I. 42. References 1. M. [34. Electrochim. It must be emphasized that different chip manufacturers have their unique combination of electrodeposition tools. nanoscale Cu interconnects that are to be uniformly laid on hundreds to thousands of chips in a 300 mm wafer. IEEE Trans. The model is based on the assumptions that the local growth velocity is proportional to the surface coverage of the accelerator and the accelerator remains segregated at the metal/electrolyte interface during copper deposition.). proprietary tailored bath. T. [7. 4. During deposit growth on nonplanar geometries. 42. Magn. Electrochim..: Batch fabricated thin film. Magnetic recording head. process integration. All these aspects are addressed in greater detail in different chapters of this book. 729 (1970) 3. Thus by optimizing the reaction rates (by varying additive concentration and adjusting the current density of Cu deposition). 6(4). and resistance to electromigration are some of the key requirements for a high yielding. and integration scheme for copper chip interconnects.. M. M.

R. 2975 (2003) 9. T.. B. P. and Landolt.): Electrodeposition Technology: Theory and Practice. D. I.: Current distribution in a jet through-hole system during periodic electrolysis. E. M. Electrochem. 136(2)... Jahnes. Datta..: Simulation of leveling in electrodeposition. M. and Landolt. J. Datta 5. Datta. 81 (1980) 25. 3. Soc. Plating. 1657 (1983) 26. Uzoh. W. J. R. J. T. A. (eds. Dukovic. II. C. (eds. L. R. Acta. C. N. Agarwala.. J. and Antonov. Romankiw. 137. IBM J. Schmitt. E.. Chang. P. 97 (1985) 27. 140(5). Dev. Soc. Datta. J. (eds. Soc. M. Datta. 63. O... Tummala. T. 239. 3779 (1995) 7. S. S. (eds. J. New Jersey (1987) 6. R. 249 (1959) 20. Electrochem. Part III. J. H. W. Wan. 253 (1965) 18. J.. M. 37(2). R. 48. W. Theoretical analysis. and Tobias. R.. Landolt D. Soc. Electrochem. P. Acta. L. 1109 (1994) 21. L. Electrochem. R. E. 125 (1993) 15. D. D. J. J. 130. Electrochim. and West.: Fundamental aspects and applications of electrochemical microfabrication.). W. Electrochim. Yung. and Totta. Datta. and Cheh. N. Kardos.. Romankiw. H.. and Tummala. Horkans..: In situ scanning tunneling microscopy of copper deposition with Benzotriazole.. 567 (1998) 8. Surface Technol. Soc. CRC Press. T..70 M. and Conway. 143(12)... and Schultze. 25. Seraphim. 2303 (1991) 23. 143(10).: In New Trends in Electrochemical Technology. J. Dukovic. A.. and Muller. Z.. J. Seiter. C. 3122 (1996) 22. Electrochem. O’M.: On the mechanism of levelling by addition agents in electrodeposition of metals.: Some theoretical aspects of pulse electrolysis. J. Res. M.. 39(8-9).. IBM J. Electrochim. 136(1). New York (1997) 10... H. 42. 1380 (1993) 29. G. C. Chen. 133. 206 (1989) . V.. 408 (1989) 28. 45. J. M. Dev. Soc. and Deligianni. K. and Yang. 2nd edition. Y. Soc. D. M.: Blocking inhibitors in cathodic leveling. J. D.. Electrochim. New York 6(1).: Feature-scale simulation of resist-patterned electrodeposition. Matlosz. H.. Chin. J. Yeager. Electrochim.. Datta. Romankiw. O. Electrochem.: Electrochemical and materials science aspects of alloy deposition. L. J. Electrochem. Acta. C.: In Microelectronic Packaging Handbook. Ibl. J.. and Landolt. Bockris. M. B.. Electrochem. G. J. Rymaszewski. Deligianni. 61. Dukovic. Soc. 138(8). P. G.. F..: Plating of copper into through-holes and vias.: Leveling and microstructural effects of additives for copper electrodeposition. and Turner. Damascene copper electroplating for chip interconnections. 2535 (2000) 12. Horkans. M. and Klopfenstein. Soc. J. O.. A. T.. and Gewirth. 3927 (1996) 16.. Elektrochemie. Kudriavtsev.: Electrodeposition of metals and alloys-new results and perspectives. Pesco. O.: The current distribution within plated through-holes.: Mass transfer and current-potential relation in pulse electrolysis. T. Plenum Press. A.. D. 146. PV 86–17. T. J. Shenoy. Kelly. Electrochemical Society Proceedings. R. New York.. 10. C. Nye.: Current distribution on microprofiles. Electrochem. P. Microelectronic Packaging. Acta. Electrochem.: In Comprehensive Treatise of Electrochemistry. N..: Experimental investigation of mass transport in pulse plating. U.. 3 (2005) 11.). J. 1075 (1994) 13. H. A. H. W. 10(3). Roeder. 2540 (1999) 24. III.: Mechanic [sic] study of copper deposition onto gold surfaces by scaling and spectral analysis of in situ atomic force microscopic images. R. Winand. Andricacos. Alkire. Res. Y. C. Tong. H. E. C. Kruglikov. Schimdt. Part I. (1982) 14. M. 129. C. J. Tian. Armstrong.). A. Chapman and Hall. Osaka. Madore. 316 (1974) 17.. Andricacos. Soc.: Electrocrystallization of metals. H. and Alkire. Surface Technology. Dukovic. H. R. Vorobiova. 3748 (1990) 19. D. and Fischer. 39. Barr. C.: Electrochemical processing technologies in chip fabrication: Challenges and opportunities. 142. 229.. Ya. Ibl.: Electrochemical fabrication of mechanically robust C4s. H. Acta.

D... Josell. H. Dubin. Shankar. Huber. Huber. P.. J. Stafford. Winnad. Moffat. C. L. Soc. A. A. and Josell. D. Moon.: A superfilling model that predicts bump formation. H. Ozemoyah. Wiley Interscience. Wheeler. Simka... J. S. Kelly. T. T. New York. W. J.. 31 (2005) 37.: Electrodeposition science and technology in the last quarter of the twentieth century. C767 (2001) 39. W. Josell.: Modeling of superconformal electrodeposition using the level set method. Schlesinger. T. P. T. 150. J. C. 61 (2000) 31. 4th edition. Andricacos.: (eds. Electrochem.. M. S.. and Prakash. D....4 Electrodeposition 71 30.. J. 1091 (1994) 32. P. H. and Datta. and Schultze.. V. C.. S. Electrochem. O. and Josell. Donepudi.. 39.). 148.. ULSI XIV. Venkatachalapathy. D. Stanishevsky. C. T. and Paunovic. Electrochem.. Mayer. (eds. Dini. and Reid. R. Soc.. CRC Press. Solid-State Lett. W. M.. Bonevich. P. C. 4. D. D.: Room temperature annealing of damascene plated Cu chip metallization.: A simple equation for predicting superconformal electrodeposition in submicrometer trenches.. J.. Soc. Wheeler. G. 9 (2002) 34.: Superconformal electrodeposition of copper.. S.: Electrodeposition of copper from sulfate electrolytes: Effects of Thiourea on resistivity and electrodeposition mechanism of copper. Electrochim. E. J.. 4.. P. & Solid-State Lett. P. S.. D. Metallization Conf. I. M.: In Modern Electroplating. J. Proc. 147(12). W. E.. C. Landolt.. M. and Noyan. 81 (1998) 36. D.: In New trends in electrochemical technology.. 4524 (2000) 35. S. 3. P. Huber. R. Marieb.. Soc. H. C50 (2001) . 4(2). Acta. Electrochem.. Adv. Datta. Cignac. West. microelectronic packaging. M. & Solid-State Lett. and Moffat. Osaka. J. C302 (2003) 40.. Electrochem. V. Electrochem. J. R..: Electrodeposition of metals and alloys-new results and perspectives. Johnson. D. Electrochem. Wheeler. and Moffat. W.). New York. R. Cabral. C26 (2001) 38. 149(3). Moffat. 13 (2001) 33. T. M. Bonewich..: Superconformal electrodeposition of copper in 500–90 nm features.